AN179 Cortex™-M3 Embedded Software Development

Cortex-M Series는 Classic ARM과 비교할때 Exception handling, Execution Mode 등에서
다른 구조를 가지고 있다.

Table of Contents

1. The Cortex™-M3

1.1. Nested Vectored Interrupt Controller (NVIC)

1.2. Memory Protection Unit (MPU)

1.3. Debug Access Port (DAP)

1.4. Memory map

2. Developing software for Cortex-M3

2.1. Exception handling

2.2. Memory Protection Unit (MPU)

2.3. Stack and heap configuration

2.4. Instruction set support

2.5. Bit-banding

2.6. Execution Modes

2.7. Supervisor Calls (SVC)

2.8. System Timer (SysTick)

2.9. RVCT 3.0 Options

3. Moving Existing ARM Projects to the Cortex-M3

3.1. General code modifications

3.2. Changes to startup code

3.3. Changes to Exception Handling

3.4. Retargeting for new device

3.5. Exploiting new features of the Cortex-M3

4. Debugging with the Cortex-M3

AppsNote179.pdf

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